Design Verification Engineer – Debug and Trace Verification
About GlobalFoundries
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Introduction:
MIPS is seeking an experienced Design Verification Engineer with over 7 years of industry experience to lead verification efforts focused specifically on the Debug and Trace Unit. The successful candidate will have extensive hands-on experience utilizing advanced verification methodologies, including constrained random testing, and coverage-driven verification. This senior role involves close collaboration with CPU architects, designers, and cross-functional global teams to ensure high-quality, high-performance processor designs.
Your Job:
Key Responsibilities:
Lead and drive verification activities for Debug Unit to closure.
Collaborate closely with design teams and architects to thoroughly understand and interpret microarchitectural and functional specifications.
Develop comprehensive verification plans and execute these plans through testbench creation, test case development, and rigorous analysis.
Create directed and constrained random test cases in SystemVerilog, Assembly, and C to verify complex debug triggers and other scenarios.
Analyse verification coverage metrics to identify and close coverage gaps efficiently.
Automate and optimize verification flows and regression environments using scripting languages like Python, Perl, TCL, or Shell.
Mentor junior verification engineers, providing technical guidance and leadership within the verification team.
Other Responsibilities:
Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs
Required Qualifications:
Bachelor’s or Master’s degree or higher in Electronics/Electrical/Computer Engineering.
7+ years of relevant verification experience, specifically in CPU or complex SoC verification.
Deep knowledge and practical experience with verification methodologies such as UVM and constrained random verification.
Proficiency in SystemVerilog, Verilog, C/C++, and Assembly.
Solid understanding of interconnect and coherency protocols such as AXI, APB, ACE, OCP, CHI.
Strong scripting skills in Python, Perl, TCL, or Shell.
Experience with CPU architectures, particularly RISC-V, ARM, or MIPS.
Preferred Qualifications:
Familiarity with functional safety standards (e.g., ISO 26262).
Prior exposure to ARM or RISCV Debug Architecture.
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As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.
All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.
To ensure that we maintain a safe and healthy workplace for our GlobalFoundries employees, please note that offered candidates who have applied for jobs in India will have to be fully vaccinated prior to their targeted start date.
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