SEC

Senior Yield Analysis Engineer

12100 Samsung Blvd, Austin, TX, USA Full time

About Samsung Austin Semiconductor
Samsung is a world leader in advanced semiconductor technology, founded on the belief that the pursuit of excellence creates a better world. At SAS, we are Innovating Today to Power the Devices of Tomorrow. 

Come innovate with us!

Position Summary

As a Yield Analysis Engineer at Samsung Austin Semiconductor, you will own key high volume products across all tech nodes. The individual will collaborate with customer and internal teams to monitor health of line and trace yield deviations to closure.

Role and Responsibilities

Here’s What You’ll Be Responsible For:

  • Yield event closure and defense line: Drive detection source to closure by confirmation of defense line effectiveness.

  • Customer yield management:  Prepare customer material set, cross-functional alignment on overall message, and active meeting participation required.

  • Commonality: Daily wafer testing (EDS) map review and yield summary, analytical deep dives (root cause for bin and zonal shifts), dog tool analysis, and integrated issues resulting from multiple change points to identify source of yield degradation or opportunity

  • Change point analyses: YA is responsible for all change point analyses for spec release for both EDS and FT yield.  This includes deep dives of change points to provide specific bin / zonal issues with failing change point proposals.

Skills and Qualifications

Here’s What You’ll Bring to Samsung:

  • Bachelor's/Master's of Science in STEM field, Electrical Engineering, Physics, or Chemical Engineering preferred

  • >7 yrs experience as Device and/or Process Eng (understanding of semiconductor process, coding, process integration, device physics)

Knowledge, Skills, Abilities, Software, and Tools

  • Experience in a high volume production environment and demonstration of strong yield analysis capability (preferred analysis tools / coding: Spotfire / JMP / R / Python).

  • RF Product, Process Integration & Device Physics experiences are prefered.

  • Experience with FinFET technology and related production flow are desired.

  • Strong written and verbal communication skills required as engineer will report to Exec level and expected to engage directly with end customer.

  • Integrity, excellent teamwork, flexibility, strong work ethic, and a sense of urgency on the job.

#LI-NF1

Total Rewards
At Samsung SAS, base pay is just one part of our total compensation package. The base compensation for this role will depend on education, experience, skills, and location.

We offer a comprehensive benefits package, including:

  • Medical, dental, and vision insurance
  • Life insurance and 401(k) matching with immediate vesting
  • Onsite café(s) and workout facilities
  • Paid maternity and paternity leave
  • Paid time off (PTO) + 2 personal holidays and 10 regular holidays
  • Wellness incentives and MORE
     

Eligible full-time employees (salaried or hourly) may also receive MBO bonuses based on company, division, and individual performance.

All positions at SAS are full-time on-site.

U.S. Export Control Compliance
This role requires access to information subject to U.S. export control laws. Applicants must be authorized to access such information or eligible for government authorization.

Trade Secrets Notice
 By submitting an application, you agree not to disclose to Samsung—or encourage Samsung to use—any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.

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* Samsung Electronics America, Inc. and its subsidiaries are committed to employing a diverse workforce, and  provide Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.