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Tenstorrent

RISC-V CPU Microarchitecture / RTL Intern

Santa Clara, California, United States Full Time

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

 We’re building the future of AI hardware and software by developing next-generation compute through innovative CPU and AI architectures. This internship gives students a hands-on opportunity to work on a high-performance RISC-V processor and gain practical experience in CPU design. As part of our CPU design team, the intern will contribute directly to advancing state-of-the-art CPU technology while learning from experienced engineers across architecture, RTL, and verification.

This role is on-site based out of Santa Clara.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

 

Who You Are

  • A motivated and detail-oriented student passionate about CPU design and microarchitecture.
  • Excited to learn about the intersection of RTL, verification, and physical design flow.
  • A strong communicator who thrives in collaborative, cross-disciplinary environments.

 

What We Need

  • Enrolled in a Master’s or PhD program in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Proficiency in hardware description languages such as Verilog, SystemVerilog, or VHDL.
  • Understanding of RISC-V architecture and CPU microarchitecture concepts.

 

What You Will Learn

  • Design and verify RTL components for next-generation RISC-V CPU cores.
  • Collaborate on developing and refining verification environments to ensure high-quality design outcomes.
  • Optimize RTL for performance, power, and area (PPA) trade-offs.
  • Explore and apply AI-assisted design tools to accelerate the CPU design process.
 

Compensation for all interns at Tenstorrent ranges from $50/hr - $70/hr including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.